Intel Core 2 Quad Q6600 2.40 GHz/8 Mb/1066 (SLACR) s775

Артикул: 2633rd

600 грн.

Наличие: нет в наличии

Модель: Q6600_SLACR

Количество − +

General information
Type	CPU / Microprocessor
Family	Intel Core 2 Quad
Processor number ?	Q6600
Part number	HH80562PH0568M BX80562Q6600
Frequency (GHz) ?	2.4
Bus speed (MHz) ?	1066
Clock multiplier ?	9
Package type	775-land FC-LGA6
Socket type	Socket 775 (LGA775)
Architecture / Microarchitecture / Other
CPUID	06FBh
Core stepping	G0
Processor core	Kentsfield
Manufacturing technology (micron)	0.065
Number of cores	4
L2 cache size (MB) ?	8
Features	EM64T technology ? Enhanced SpeedStep technology ? Execute disable bit ? Extended Halt state MMX SSE SSE2 SSE3 SSSE3 Thermal Monitor 2 Virtualization technology (VT-x)
Core voltage (V) ?	1.1 - 1.372
Case temperature (°C) ?	71
Thermal Design Power (Watt) ?	95
Notes on sSpec SLACR
The processor supports the 775_VR_CONFIG_05A (mainstream) guidelines for processors with TDP up to 95 Watt, Iccmax up to 100A, and VID up to 1.4V. The part is discontinued. Last order date for OEM and boxed processors is May 8, 2009. Last shipment date for boxed processors is August 7, 2009. Last shipment date for OEM processors is July 9, 2010.

Related S-Spec numbers

In addition to the SLACR S-Spec, this processor was also manufactured with a few production and pre-production S-Spec numbers:

Stepping	S-Spec	HH80562PH0568M	BX80562Q6600
B0	QMAQ	+
B1	QQGV	+
B3	QUPT	+
B3	SL9UM	+	+
G0	QXVD	+
G0	SLACR	+	+

NOTE: Engineering and qualifications samples are marked with this color

Intel Core 2 Quad Q6600 SLACR

Part number:	HH80562PH0568M
Measured Frequency:	2400 MHz

Comment:
Submitted by:	Boris

General information
Vendor:	GenuineIntel
Processor name (BIOS):	Intel(R) Core(TM)2 Quad CPU Q6600 @ 2.40GHz
Cores:	4
Logical processors:	4
Processor type:	Original OEM Processor
CPUID signature:	6FB
Family:	6 (06h)
Model:	15 (0Fh)
Stepping:	11 (0Bh)
TLB/Cache details:	3rd-level cache: 4-MB, 16-way set associative, 64-byte line size (Intel Xeon processor MP, Family 0Fh, Model 06h), 2nd-level cache: 4-MB, 16-way set associative, 64-byte line size 64-byte Prefetching Data TLB: 4-KB Pages, 4-way set associative, 256 entries Data TLB: 4-MB Pages, 4-way set associative, 32 entries Instruction TLB: 2-MB pages, 4-way, 8 entries or 4M pages, 4-way, 4 entries Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries L1 Data TLB: 4-KB pages, 4-way set associative, 16 entries L1 Data TLB: 4-MB pages, 4-way set associative, 16 entries

Cache:	L1 data	L1 instruction	L2
Size:	4 x 32 KB	4 x 32 KB	2 x 4 MB
Associativity:	8-way set associative	8-way set associative	16-way set associative
Line size:	64 bytes	64 bytes	64 bytes
Comments:	Direct-mapped	Direct-mapped	Non-inclusive Direct-mapped 1 cache per 2 cores

Instruction set extensions		Additional instructions

MMX		CLFLUSH
SSE		CMOV
SSE2		CMPXCHG16B
SSE3		CMPXCHG8B
SSSE3		FXSAVE/FXRSTORE
		MONITOR/MWAIT
		SYSENTER/SYSEXIT

Major features		Other features
On-chip Floating Point Unit		36-bit page-size extensions
64-bit / Intel 64		64-bit debug store
NX bit/XD-bit		Advanced programmable interrupt controller
Intel Virtualization		CPL qualified debug store
Enhanced SpeedStep		Debug store
		Debugging extensions
		Digital Thermal Sensor capability
		LAHF/SAHF support in 64-bit mode
		Machine check architecture
		Machine check exception
		Memory-type range registers
		Model-specific registers
		Page attribute table
		Page global extension
		Page-size extensions (4MB pages)
		Pending break enable
		Perfmon and Debug capability
		Physical address extensions
		Self-snoop
		Thermal monitor
		Thermal monitor 2
		Thermal monitor and software controlled clock facilities
		Time stamp counter
		Virtual 8086-mode enhancements
		xTPR Update Control