Intel Pentium D 945 3.4 GHz/4 Mb/800 (SL9QQ) s775

Intel Pentium D 945 3.4 GHz/4 Mb/800 (SL9QQ) s775

Артикул:  3945rd
100 грн.
Наличие: нет в наличии
Модель: Pentium_D_945_SL9QQ
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Описание из: http://www.cpu-world.com/sspec/SL/SL9QQ.html

SL9QQ specifications

General information
TypeCPU / Microprocessor
FamilyIntel Pentium D
Processor number  ? 945
Part numberHH80553PG0964MN
BX80553945
Frequency (GHz)  ? 3.4
Bus speed (MHz)  ? 800
Clock multiplier  ? 17
Package type775-Land FC-LGA6
Socket typeSocket 775 (LGA775)
Architecture / Microarchitecture / Other
CPUID0F65h
Core steppingD0
Processor corePresler
Manufacturing technology (micron)0.065
Number of cores2
L2 cache size (MB)  ? 4
FeaturesEM64T technology  ? 
Enhanced SpeedStep technology  ? 
Execute disable bit  ? 
Core voltage (V)  ? 1.225 - 1.325
Case temperature (°C)  ? 63.4
Notes on sSpec SL9QQ
  • The processor supports the 775_VR_CONFIG_05A (mainstream) guidelines for processors with TDP up to 95 Watt, Iccmax up to 100A, and VID up to 1.4V.

Related S-Spec numbers

In addition to the SL9QQ S-Spec, this processor was also manufactured with a few production and pre-production S-Spec numbers:

SteppingS-SpecHH80553PG0964MNBX80553945BX80553945R
C1QRLS+  
SL9QB+++
D0SL9QQ++ 

NOTE: Engineering and qualifications samples are marked with this color


SL9QQ CPUID information

Intel Pentium D 945 SL9QQ
Part number:HH80553PG0964MN
Measured Frequency:3396 MHz
Comment:
Submitted by:CPU-World
 
General information
Vendor:GenuineIntel
Processor name (BIOS):Intel(R) Pentium(R) D CPU 3.40GHz
Cores:2
Logical processors:2
Processor type:Original OEM Processor
CPUID signature:F65
Family:15 (0Fh)
Model:6 (06h)
Stepping:5 (05h)
TLB/Cache details:Data TLB: 4-KB or 4-MB pages, fully associative, 64 entries
Instruction TLB: 4-KB, 2-MB or 4-MB pages, fully associative, 128 entries
No 2nd-level cache or, if processor contains a valid 2nd-level cache, no 3rd-level cache

Cache:L1 dataL1 instructionL2
Size:16 KB12K uops2 MB
Associativity:8-way set
associative
8-way set
associative
8-way set
associative
Line size:64 bytes 64 bytes
Comments:sectored cache  
 
Instruction set extensionsAdditional instructions
MMXCLFLUSH
SSECMOV
SSE2CMPXCHG16B
SSE3CMPXCHG8B
 FXSAVE/FXRSTORE
 MONITOR/MWAIT
 SYSENTER/SYSEXIT
 
Major featuresOther features
On-chip Floating Point Unit36-bit page-size extensions
64-bit / Intel 6464-bit debug store
NX bit/XD-bitAdvanced programmable interrupt controller
Enhanced SpeedStepCPL qualified debug store
 Debug store
 Debugging extensions
 L1 context ID
 LAHF/SAHF support in 64-bit mode
 Machine check architecture
 Machine check exception
 Memory-type range registers
 Model-specific registers
 Page attribute table
 Page global extension
 Page-size extensions (4MB pages)
 Pending break enable
 Perfmon and Debug capability
 Physical address extensions
 Self-snoop
 Thermal monitor
 Thermal monitor and software controlled clock facilities
 Time stamp counter
 Virtual 8086-mode enhancements
 xTPR Update Control